Method and apparatus for executing an instruction contingent upon a condition present in another data processor

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The Motorola, Inc. patent solves the following problem:

When the data processors in the first frame forms, expansion instruction or register set is usually implemented by simply adding additional electronics in the central processing unit (CPU), although significant expansion may Cabinet needs more space and power supply capacity. With the advent of minicomputers, these enhancements more difficult to integrate into existing settings. An alternative to the expansion of the CPU is to provide additional circuitry in a special "hardware support" module. However, its implementation needed in many of the signal if the internal CPU to be carried out by the wiring harness to the module. Additionally, the CPU is often need new signals that coordinate the processing activities of the module. One form of this type of interface used in Digital Equipment Corporation in the couple PDP-11 FP-11C Floating Point processor.

Our analysis of this patent is as follows:

Motorola, Inc.’s patent US 4750110 A deals with Method and apparatus for executing an instruction contingent upon a condition present in another data processor.
A system for interfacing a processor to a coprocessor using the standard cycle bus. processor, upon encountering his instruction stream an instruction with a particular format Operation words, moving in a Command meeting to follow the words of the Operation of a particular Coprocessor appointed a coprocessor Identity field meeting in Operation. In examining the meaning of Command meeting, the Coprocessor respond to any of a set of primitives response indicating functions Coprocessor processor needs to do to support the Command with Coprocessor. interface provides for all functions that Coprocessor needed, including the selective vectoring to appropriate handlers outside.

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