Broad band optical fiber telecommunications network

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The Nynex Science & Technology, Inc. patent solves the following problem:

The present invention relates to telecommunications networks, especially in fiber optic transmission of broadband signals, including voice telephony, in a single network.

Our analysis of this patent is as follows:

Nynex Science & Technology, Inc.’s patent US 5861966 A deals with Broad band optical fiber telecommunications network.
A broadband optical fiber network to transmit signals between the subscriber and a head end. A coherent light source used in the head end to generate signals for transmission to the subscriber. Subsequent groups of low optical transmission of followed Optical separators or splitters carrying coherent light from the head end to the subscriber. Non-coherent light source in providing broadband optical signal located on the subscriber. Subsequent groups on optical transmissions of followed Optical combiners bring broadband optical light signal at the head end.

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Flash memory array and decoding architecture

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The Aplus Integrated Circuits, Inc. patent solves the following problem:

In recent years, flash memory devices are widely used in computer related equipment and other electronic appliances such as storage devices. The nonvolatile and on-chip automatic capabilities of a flash memory are critical for storing data in many applications. As an example, flash memories always used for BIOS storage of a personal computer. Moreover, the small physical size of flash memory also makes them very suitable for portable applications. Therefore, they are used for storing programs and data for many portable electronic devices such as cellular phones, digital cameras and video game platforms.

Our analysis of this patent is as follows:

Aplus Integrated Circuits, Inc.’s patent US 5856942 A deals with Flash memory array and decoding architecture.
A flash memory circuit of a word line decoder with even and odd word line and stick to a source line decoder with a source line latch disclosed. The word line decoder and source decoder line providing the ability to erase the memory cells in two adjacent lines of words in a flash memory together and verify the memory cells of the word line by word line. By erasing two adjacent rows together, the embodiments of the invention to eliminate the erasure and source noise problems associated with conventional flash memory circuit. Decoding architecture provides flexible volume Papasa be from a pair of a large number of many pairs of lines of words. By dividing the memory cells in a word line into a number of parts, the decoding circuit further provides the ability to choose the memory cells in a word line side to erase.

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