Method for wrapping a floral grouping with a sheet of material constructed of paper and having printed and embossed patterns thereon

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The Southpac Trust International, Inc. patent solves the following problem:

Our analysis of this patent is as follows:

Southpac Trust International, Inc.’s patent US 6347480 B1 deals with Method for wrapping a floral grouping with a sheet of material constructed of paper and having printed and embossed patterns thereon.
A decorative wrapper for a flower or flower pot in which a sheet of material embossed and printed pattern on it wrapped about at least some of the floral or flower pot. The printed pattern may be in or out of the embossed pattern, or a portion of the printed and embossed pattern can record with one another, and a portion of the printed and embossed pattern can be from one a. The sheet material can be in the form of a pad containing a plurality of sheets of material or in the form of a roll where the sheets of material separable from the roll of material.

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Scalable architecture for high density CPLD’s having two-level hierarchy of routing resources

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The Lattice Semiconductor Corporation patent solves the following problem:

The invention is generally directed to monolithic integrated circuit, and more specifically to a scalable architecture for use in automatic Logic Devices (PLD). It is even more specifically directed to a subclass of PLD's known as High-Density Complex automatic Logic Devices (HCPLD).

Our analysis of this patent is as follows:

Lattice Semiconductor Corporation’s patent US 6348813 B1 deals with Scalable architecture for high density CPLD’s having two-level hierarchy of routing resources.
An improved, scalable CPLD device has a two-tiered hierarchical switch make up a Global Switch Matrix (GSM) and an even number of Segment Switch Matrices (SSM). An even number of Super Logic Blocks (SLB) with each SSM. Each SSM and the SLB's made a lot of couples in GSM. Each SLB has a relatively large number of inputs (at least 80) and generate product term signal (PT's) products to independent terms input given from SSM SLB inputs. Some of the product terms generated for each SLB dedicated to the SLB-local control. Each SLB has at least 32 macrocells and at least 16 I / O pads feedback both to the local SSM and global GSM. 100% intra-segment connecting assured during each part is that each part can act as an independent, mini-CPLD. Each SSM has more lines, dedicated to inter-segment (global) communication. The large number of parallel inputs to each SLB ease implementation of 64-bit wide designs. The symmetry in the design of each chapter allow for more finely-granulated implement the same for 32 or 16-bit wide designs.

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